-- KJ27-30 2-bit DFF shift register   E235   11 1017
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
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entity two_bit_sr is 
	port 
	(
	CLK: 	in 	std_logic;
	INPUT: in 	std_logic;
	CLR: 	in 	std_logic;
	
	Q0OUT: 	out 	std_logic;
	Q1OUT:  	out 	std_logic
	); 
end two_bit_sr;
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Architecture behavioral of two_bit_sr is 
component d_ff is
   port
   (
      	CLK : in std_logic;
      	D : in std_logic;
			CLR : in std_logic;
			Q : out std_logic
   );
end component d_ff;

signal Q0 : std_logic;
signal Q1 : std_logic;

begin
FF1: d_ff port map (CLK => CLK, D => INPUT, CLR => CLR, Q => Q0);
FF2: d_ff port map (CLK => CLK, D => Q0, CLR => CLR, Q => Q1);

Q0OUT <= Q0;
Q1OUT <= Q1;

end behavioral;
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